/*
 * Copyright (c) 2022 Fraunhofer IESE
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met: redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer;
 * redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution;
 * neither the name of the copyright holders nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include "memory/dramsys_wrapper.h"
// void registerExitCallback(const std::function<void()> &callback)
// {
//     exitCallbacks().push_back(callback);
// }
namespace gem5 {

namespace memory {


DRAMSysWrapper::DRAMSysWrapper(sc_core::sc_module_name name,
                               ::DRAMSys::Config::Configuration const &config,
                               bool recordable)
    : sc_core::sc_module(name),
      dramsys(instantiateDRAMSys(recordable, config)) {
    tSocket.register_nb_transport_fw(this, &DRAMSysWrapper::nb_transport_fw);
    iSocket.register_nb_transport_bw(this, &DRAMSysWrapper::nb_transport_bw);

    tSocket.register_b_transport(this, &DRAMSysWrapper::b_transport);

    tSocket.register_transport_dbg(this, &DRAMSysWrapper::transport_dbg);
    iSocket.bind(dramsys->tSocket);

    // Register a callback to compensate for the destructor not
    // being called.
    // registerExitCallback(
    //     []()
    //     {
    //         // Workaround for BUG GEM5-1233
    //         sc_core::sc_stop();
    //     });
}

std::shared_ptr<::DRAMSys::DRAMSys> DRAMSysWrapper::instantiateDRAMSys(
    bool recordable, ::DRAMSys::Config::Configuration const &config) {
    return recordable ? std::make_shared<::DRAMSys::DRAMSys>("DRAMSys", config)
                      : std::make_shared<::DRAMSys::DRAMSys>("DRAMSys", config);
}

void DRAMSysWrapper::b_transport(tlm::tlm_generic_payload &payload,
                                 sc_core::sc_time &delay) {
    // Subtract base address offset
    payload.set_address(payload.get_address());

    iSocket->b_transport(payload, delay);
}

tlm::tlm_sync_enum
DRAMSysWrapper::nb_transport_fw(tlm::tlm_generic_payload &payload,
                                tlm::tlm_phase &phase,
                                sc_core::sc_time &fwDelay) {
    // Subtract base address offset
    payload.set_address(payload.get_address());

    return iSocket->nb_transport_fw(payload, phase, fwDelay);
}

tlm::tlm_sync_enum
DRAMSysWrapper::nb_transport_bw(tlm::tlm_generic_payload &payload,
                                tlm::tlm_phase &phase,
                                sc_core::sc_time &bwDelay) {
    return tSocket->nb_transport_bw(payload, phase, bwDelay);
}

unsigned int DRAMSysWrapper::transport_dbg(tlm::tlm_generic_payload &trans) {
    // Subtract base address offset
    trans.set_address(trans.get_address());

    return iSocket->transport_dbg(trans);
}

} // namespace memory
} // namespace gem5
